1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing of the same. More particularly, the present invention relates to a semiconductor device and a method of manufacturing the same, in which an SOG (spin on glass) film using a low dielectric constant material is formed as a part of an interlayer insulating film.
2. Description of the Related Art
Conventionally, an SOG (spin on glass) insulating film is formed by a spin coating method. The technique using such an SOG film as a part of an interlayer insulating film is frequently used to remove unevenness of the surface of a substrate to be formed due to wiring patterns.
However, in the conventional SOG film using silicate material, there are the following problems. That is, first, 1 a crack is easily generated because of large volume shrinkage at the time of a baking process. Second, 2 the spin coating method needs to be performed plural times to form a thick SOG film, because the film thickness of the SOG film is at most 200 nm when the spin coating method is performed once. And, third, 3 another material having lower dielectric constant is needed to decrease capacitance between wiring patterns, because the dielectric constant of the SOG film is approximately the same as that of a SiO.sub.2 which is formed by a CVD method. For these reasons, a SOG film using HSQ (Hydrogen Silsesquoxane: (HSiO.sub.3/2).sub.n) is proposed to solve the above problems.
FIGS. 1A to 1D are cross sectional views of a semiconductor device using an SOG film as a part of an interlayer insulating film in a manufacturing method. This method is proposed in "PLANARIZATION PERFORMANCE OF FLOWABLE OXIDE.TM. IN THE SUB-0.5 .mu.m REGIME" (Advanced Metallization and Interconnect Systems for ULSI Applications, 1995, pp. 121-125).
As shown in FIG. 1A, a silicon oxide film 502 is formed on a silicon substrate 501 as a lower interlayer insulating film by a plasma CVD method using TEOS (Tetraethoxysilane) as a material source. After metal wiring patterns 503 are formed on the interlayer insulating film 502, a liner oxide film 504 is formed by a plasma CVD method using TEOS as a material source to cover the metal wiring patterns 503.
Subsequently, as shown in FIG. 1B, HSQ is spin-coated to form an HSG-SOG film 505. Then, the HSG-SOG film 505 is baked.
Next, as shown in FIG. 1C, a silicon oxide film 506 is formed on the HSG-SOG film 505 by a plasma CVD method using TEOS as a material source.
Subsequently, as shown in FIG. 1D, the silicon oxide film 506 is flattened by a CMP (chemical mechanical polishing) method to form an upper interlayer insulating film 507.
It should be noted that similar manufacturing methods are described in Japanese Laid Open Patent Applications (JP-A-Heisei 7-240460 and JP-A-Heisei 8-111458).
However, in the above-mentioned structure of the interlayer insulating films, there is a problem. That is, the dielectric constant of the HSQ film increases because of the escape of moisture from the lower silicon oxide film using the TEOS system material gas at the time of baking of the HSQ film. For a comparison experiment, a comparison sample is formed in which the whole interlayer insulating film is formed of a silicon oxide film by a CVD method using a high density plasma. In both of the conventional sample shown in FIGS. 1A to 1D and the comparison sample, metal wiring patterns are formed to have a space of 0.3 .mu.m. When the capacitance of the both samples between the metal wiring patterns are measured, the conventional sample has a capacitance between the metal wiring patterns of 110% of that of the capacitance of the comparison sample between the metal wiring patterns. That is, the HSQ film, which should have a low dielectric constant film, has a dielectric constant higher than that of the silicon oxide film. This is because moisture generated from the lower film in case of baking of the HSQ film invades the HSQ film, so that Si--H couplings decrease and Si--OH couplings increase. The dielectric constant of the HSQ film increases as the Si--H couplings decrease and the Si--OH couplings increase. It is known that the dielectric constant of the HSQ film becomes high when the HSQ film is baked in an atmosphere containing oxygen. Therefore, it could be considered that the same phenomenon occurs.
When the HSQ film is covered by an upper insulating film, the HSQ film is not influenced so much by the upper insulating film, compared with the lower insulating film. However, in a portion of the HSQ film contacting the upper insulating film, the Si--OH couplings increase and the Si--H couplings decrease.